NAME

AED_x86_instruction_walk — aed x86 instruction functions

SYNOPSIS

/* -laed */
#include <aed/x86.h>

void
AED_x86_instruction_walk(void (*callback)(const AED_x86_instruction_info *, void *), void *opaque);

DESCRIPTION

The AED_x86_instruction_walk() function iterates over all instructions supported by both the aed_x86_decoder(3) and aed_x86_encoder(3). It is intended to be used to obtain information about instructions that is independent of their encoding. The callback is invoked for every such instruction and the opaque argument is passed as is.

The definition of the AED_x86_instruction_info structure is as follows:

typedef struct AED_x86_instruction_info {
	AED_x86_mnemonic mnemonic;
	uint8_t map;
	uint8_t op;
	uint8_t mode;
	uint64_t selector;

	struct {
		AED_x86_isa_group group;
	} isa;

	struct {
		const AED_x86_explicit_operand o;
		uint8_t n;
	} operands;

	struct {
		const AED_x86_implicit_operand o;
		uint8_t n;
	} implicit_operands;

	struct {
		uint32_t r;
		uint32_t w;
	} flags;

	struct {
		const char *field;
		size_t offset;
	} assembler;
} AED_x86_instruction_info;

mnemonic

Numeric representation of the instruction mnemonic, such as AED_X86_ADD.

map

Instruction map number.

op

Instruction opcode.

mode

Bitmask of operating modes supported by the instruction.

AED_X86_MODE_64

Instruction supported in 64-bit mode.

AED_X86_MODE_32

Instruction supported in 32-bit mode.

AED_X86_MODE_16

Instruction supported in 16-bit mode.

selector

Bitmask of criteria that must be fulfilled in order to decode the instruction.

AED_X86_SELECTOR_AAA

Non-zero opmask register required in EVEX.AAA.

AED_X86_SELECTOR_BROADCAST

Mandatory broadcast required in EVEX.B.

AED_X86_SELECTOR_EVEX

Mandatory EVEX prefix.

AED_X86_SELECTOR_L0

(E)VEX.LL must be equal to 0.

AED_X86_SELECTOR_L1

(E)VEX.LL must be equal to 1.

AED_X86_SELECTOR_L2

EVEX.LL must be equal to 2.

AED_X86_SELECTOR_NOREX2

REX2 is not allowed.

AED_X86_SELECTOR_VEX

Mandatory VEX prefix.

isa.group

Instruction Set Architecture (ISA) group the instructions belongs in:

AED_X86_ISA_AMX,

 

AED_X86_ISA_APX,

 

AED_X86_ISA_AVX,

 

AED_X86_ISA_AVX10,

 

AED_X86_ISA_AVX512,

 

AED_X86_ISA_CACHE,

 

AED_X86_ISA_ENCRYPTION,

 

AED_X86_ISA_KEYLOCKER,

 

AED_X86_ISA_MEMORY,

 

AED_X86_ISA_MISC,

 

AED_X86_ISA_MSR,

 

AED_X86_ISA_SECURITY,

 

AED_X86_ISA_SPEC,

 

AED_X86_ISA_SSE,

 

AED_X86_ISA_VTX,

 

AED_X86_ISA_XSAVE,

 

AED_X86_ISA_AMD,

 

AED_X86_ISA_VIA

 

operands

Operands of the instruction. The o field points to an array of n AED_x86_explicit_operand structures, which are defined as follows:

typedef struct AED_x86_explicit_operand {
	uint32_t type;
	uint8_t r;
	uint8_t w;
} AED_x86_explicit_operand;

type

Bitmask of possible operand types:

AED_X86_OPERAND_ADDR

 

AED_X86_OPERAND_CR

 

AED_X86_OPERAND_DR

 

AED_X86_OPERAND_GPR

 

AED_X86_OPERAND_GPR_A

 

AED_X86_OPERAND_GPR_C

 

AED_X86_OPERAND_GPR_D

 

AED_X86_OPERAND_GPR_B

 

AED_X86_OPERAND_GPR_SP

 

AED_X86_OPERAND_GPR_BP

 

AED_X86_OPERAND_GPR_SI

 

AED_X86_OPERAND_GPR_DI

 

AED_X86_OPERAND_GPR_R8

 

AED_X86_OPERAND_GPR_R9

 

AED_X86_OPERAND_GPR_R10

 

AED_X86_OPERAND_GPR_R11

 

AED_X86_OPERAND_GPR_R12

 

AED_X86_OPERAND_GPR_R13

 

AED_X86_OPERAND_GPR_R14

 

AED_X86_OPERAND_GPR_R15

 

AED_X86_OPERAND_IMM

 

AED_X86_OPERAND_MEM

 

AED_X86_OPERAND_MMX

 

AED_X86_OPERAND_OFFSET

 

AED_X86_OPERAND_OPMASK

 

AED_X86_OPERAND_SEG

 

AED_X86_OPERAND_ST

 

AED_X86_OPERAND_TMM

 

AED_X86_OPERAND_XMM

 

AED_X86_OPERAND_YMM

 

AED_X86_OPERAND_ZMM

 

AED_X86_OPERAND_VSIB

 

r

Non-zero if the operand is read.

w

Non-zero if the operand is written.

implicit_operands

Implicit operands of the instruction. The o field points to an array of n AED_x86_implicit_operand structures, which are defined as follows:

typedef struct AED_x86_implicit_operand {
	uint8_t type;
	uint8_t reg;
	uint8_t r;
	uint8_t w;
} AED_x86_implicit_operand;

type

Either AED_X86_IMPLICIT_OPERAND_GPR, AED_X86_IMPLICIT_OPERAND_IMM, AED_X86_IMPLICIT_OPERAND_XMM or AED_X86_IMPLICIT_OPERAND_FLAGS.

reg

Register number, only applicable to AED_X86_IMPLICIT_OPERAND_GPR and AED_X86_IMPLICIT_OPERAND_XMM.

r

Non-zero if the implicit operand is read.

w

Non-zero if the implicit operand is written.

flags.r flags.w

Bitmask of read and written fields in the flags register:

AED_X86_FLAGS_CF

 

AED_X86_FLAGS_PF

 

AED_X86_FLAGS_AF

 

AED_X86_FLAGS_ZF

 

AED_X86_FLAGS_SF

 

AED_X86_FLAGS_TF

 

AED_X86_FLAGS_IF

 

AED_X86_FLAGS_DF

 

AED_X86_FLAGS_OF

 

AED_X86_FLAGS_IOPL

 

AED_X86_FLAGS_NT

 

AED_X86_FLAGS_RF

 

AED_X86_FLAGS_VM

 

AED_X86_FLAGS_AC

 

AED_X86_FLAGS_VIF

 

AED_X86_FLAGS_VIP

 

AED_X86_FLAGS_ID

 

assembler

Denotes how the instruction can be encoded using the AED_x86_assembler structure as part of aed_x86_encoder(3). If the instruction cannot be encoded, all fields will be zero.

field

Name of corresponding function pointer field in AED_x86_assembler used to encode the instruction.

offset

Offset of the corresponding function pointer field in AED_x86_assembler used to encode the instruction.

SEE ALSO

aed_x86_decoder(3), aed_x86_encoder(3), aed_x86_serializer(3)

AUTHORS

Anton Lindqvist <anton@basename.se>